Cell Broadband Engine (CBE)
Sony Computer Entertainment, Toshiba and IBM introduced the CBE microprocessor architecture as an powerful and cost-effective heterogeneous multi-core processor.
The Cell processor consists of nine cores - eight high-performance vector units (SPUs) and one conventional PowerPC core (PPU).
The main power of this architecture comes from the SPUs which are optimised for compute-intensive Single-Instruction-Multiple-Data (SIMD) operations. They provide a theoretical peak performance of about 210 GFLOPS.
A broadband interface (total bandwidth of 204.8 GByte/sec) link all components together and the main memory.
Figure 1 shows an overview of the initial implementation of Cell Broadband Engine.
Figure 1: Overview of the CBE processor architecture
Current, there are various types of Cell-based systems available, for example Cell blades as high-performance solutions for cluster computing. Sony released the PlayStation 3 game console, equipped with a low cost version of the CBE processor. Only six SPUs and only 256 MB RAM are available for user applications. But its low price makes it attractive for an alternative high performance platform.
- Chen T, Raghavan R, Dale JN: Cell Broadband Engine Architecture and its first implementation - a
performance view. IBM Journal of Research and Development 2007, 51(5):559-572.
- Kahle JA, Day MN, Hofstee HP, Johns CR, Maeurer TR, Shippy D: Introduction to the Cell
multiprocessor. IBM Journal of Research and Development 2005, 49(4/5):589-604.